COP8
| General information | |
|---|---|
| Launched | 1988 |
| Common manufacturer | |
| Performance | |
| Max. CPU clock rate | 0 Hz to 2 MHz |
| Data width | 8 (RAM), 8 (ROM) |
| Address width | 8 (RAM), 15 (ROM) |
| Architecture and classification | |
| Application | Embedded |
| Instruction set | COP8 |
| Number of instructions | 69 |
| Physical specifications | |
| Package | |
| History | |
| Predecessor | COP400 |
| Successor | none |
The National Semiconductor COP8 is an 8-bit CISC core microcontroller. COP8 is an enhancement to the earlier COP400 4-bit microcontroller family. COP8 main features are:
- Large amount of I/O pins
- Up to 32 KB of Flash memory/ROM for code and data
- Very low EMI
- Many integrated peripherals (meant as single chip design)
- In-System Programming
- Free assembler toolchain. Commercial C compilers available
- Free Multitasking OS and TCP/IP stack
- Peak of 2 million instructions per second
The COP8 has a basic instruction cycle time 1/10 of the clock frequency; a maximum 10 MHz clock will result in a maximum 1 MHz instruction execution rate. (The 10 MHz clock is used directly by some timer peripherals.) The maximum instruction execution rate is 1 cycle per byte, and most 1-byte instructions operate in one instruction cycle. Some, particularly branch instructions, take one or two cycles more. Some models include a clock doubler, and although they still accept a maximum 10 MHz input clock, they internally double it to a 20 MHz master clock which then results in a 2 MHz instruction execution rate.: 7,32
The chip is a static logic design which can tolerate an arbitrarily slow clock;: 10 most models include a second 32768 Hz quartz clock crystal oscillator which can be used for the CPU clock while the high-speed clock is disabled to save power.