Cooper Lake (microprocessor)
| General information | |
|---|---|
| Launched | June 18, 2020 |
| Marketed by | Intel |
| Designed by | Intel |
| Common manufacturer |
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| Product code | 80706 |
| Performance | |
| Max. CPU clock rate | 4.3 |
| Cache | |
| L1 cache | 64 KB per core (32 instructions + 32 data) |
| L2 cache | 1 MB per core |
| L3 cache | Up to 38.5 MB (1.375 MB/core) |
| Architecture and classification | |
| Application | 4S and 8S servers |
| Technology node | 14 nm (Tri-Gate) transistors |
| Microarchitecture | Skylake |
| Instruction set | x86-64 |
| Instructions | MMX, SSE, SSE2, SSE3, SSSE3, SSE4, SSE4.1, SSE4.2, AVX, AVX2, FMA3, AVX-512, bfloat16 |
| Extensions | |
| Physical specifications | |
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| Socket | |
| Products, models, variants | |
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| History | |
| Predecessor | Cascade Lake |
| Successors | Same generation
Next generation |
| Support status | |
| Supported | |
Cooper Lake is Intel's codename for the third-generation of their Xeon Scalable processors, developed as the successor to Cascade Lake-SP. Cooper Lake processors are targeted at the 4S and 8S segments of the server market; Ice Lake-SP serves the 1S and 2S segment.