DDR4 SDRAM
| Type of RAM | |
| Developer | JEDEC |
|---|---|
| Type | Synchronous dynamic random-access memory (SDRAM) |
| Generation | 4th generation |
| Release date | 2014 |
| Standards |
|
| Clock rate | 800–1600 MHz |
| Cycle time | 0.625 ns to 1.25 ns |
| Prefetch buffer | 8n-prefetch architecture |
| Bus clock rate | 1600 MT/s to 3200 MT/s. |
| Transfer rate | 12.8 GB/s to 25.6 GB/s |
| Voltage | Reference 1.2 V |
| Predecessor | DDR3 SDRAM (2007) |
| Successor | DDR5 SDRAM (2020) |
Double Data Rate 4 Synchronous Dynamic Random-Access Memory (DDR4 SDRAM) is a type of synchronous dynamic random-access memory with a high bandwidth ("double data rate") interface.
Released to the market in 2014, it is a variant of dynamic random-access memory (DRAM), some of which have been in use since the early 1970s, and a higher-speed successor to the DDR2 and DDR3 technologies.
DDR4 is not compatible with any earlier type of random-access memory (RAM) due to different signaling voltage and physical interface, besides other factors.
DDR4 SDRAM was released to the public market in Q2 2014, focusing on ECC memory, while the non-ECC DDR4 modules became available in Q3 2014, accompanying the launch of Haswell-E processors that require DDR4 memory.