28 nm process

The "28 nm" lithography process is a half-node semiconductor manufacturing process based on a die shrink of the "32 nm" lithography process. It appeared in production in 2010.

Since at least 1997, "process nodes" have been named purely on a marketing basis, and have no direct relation to the dimensions on the integrated circuit; neither gate length, metal pitch or gate pitch on a "28nm" device is twenty-eight nanometers.

Taiwan Semiconductor Manufacturing Company has offered "28 nm" production using high-K metal gate process technology.

GlobalFoundries offers a "28nm" foundry process called the "28SLPe" ("28nm Super Low Power") foundry process, which uses high-K metal gate technology.

According to a 2016 presentation by Sophie Wilson, 28nm has the lowest cost per logic gate. Cost per gate had decreased as processes shrunk until reaching 28nm, and has slowly risen since then.