ARM Cortex-A78
| General information | |
|---|---|
| Launched | 2020 | 
| Designed by | ARM Ltd. | 
| Performance | |
| Max. CPU clock rate | 2.4 GHz to 3.0 GHz in phones and 3.3 GHz in tablets/laptops | 
| Cache | |
| L1 cache | 32–64 KB (parity) 32kb L1 Instruction cache and 32kb L1 Data cache. or64kb L1 Instruction cache and 64kb L1 Data cache. | 
| L2 cache | 256–512 (private L2 ECC) KiB | 
| L3 cache | Optional, 512 KB to 4 MB (A78, A78AE) Optional, 512 KB to 8 MB (A78C) | 
| Architecture and classification | |
| Microarchitecture | ARM Cortex-A78 | 
| Instruction set | ARMv8-A | 
| Extensions | |
| Physical specifications | |
| Cores | 
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| Products, models, variants | |
| Product code name | 
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| Variant | |
| History | |
| Predecessor | ARM Cortex-A77 | 
| Successor | ARM Cortex-A710 | 
The ARM Cortex-A78 is a central processing unit implementing the ARMv8.2-A 64-bit instruction set designed by ARM Ltd.'s Austin centre.