POWER7
IBM Power7 4 GHz 8-way CPU (de-lidded) from an IBM 9119 | |
| General information | |
|---|---|
| Launched | 2010 |
| Designed by | IBM |
| Performance | |
| Max. CPU clock rate | 2.4 GHz to 4.25 GHz |
| Cache | |
| L1 cache | 32+32 KB/core |
| L2 cache | 256 KB/core |
| L3 cache | 4 MB/core |
| Architecture and classification | |
| Technology node | 45 nm |
| Instruction set | Power ISA (Power ISA v.2.06) |
| Physical specifications | |
| Cores |
|
| History | |
| Predecessor | POWER6 |
| Successor | POWER8 |
| POWER, PowerPC, and Power ISA architectures |
|---|
| NXP (formerly Freescale and Motorola) |
| IBM |
|
| IBM/Nintendo |
| Other |
| Related links |
| Cancelled in gray, historic in italic |
POWER7 is a family of superscalar multi-core microprocessors based on the Power ISA 2.06 instruction set architecture released in 2010 that succeeded the POWER6 and POWER6+. POWER7 was developed by IBM at several sites including IBM's Rochester, MN; Austin, TX; Essex Junction, VT; T. J. Watson Research Center, NY; Bromont, QC and IBM Deutschland Research & Development GmbH, Böblingen, Germany laboratories. IBM announced servers based on POWER7 on 8 February 2010.